From 321cdb10d4f741aac59555c0fa6b5dee2f9767d7 Mon Sep 17 00:00:00 2001 From: Leonard Kugis Date: Sun, 8 Jan 2023 04:13:03 +0100 Subject: Changed order of memory access slides --- Presentation/presentation.tex | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/Presentation/presentation.tex b/Presentation/presentation.tex index 96bbd93..a9db5c1 100644 --- a/Presentation/presentation.tex +++ b/Presentation/presentation.tex @@ -110,27 +110,27 @@ backend=biber, \end{itemize} \end{frame} -\begin{frame} +\begin{frame}{Memory access} \begin{figure}[h] \centering - \includegraphics[width=0.65\textwidth, keepaspectratio]{resources/dnn_dataflows_png} - \caption{Common dataflow models in inference architectures \cite{DBLP:journals/corr/SzeCESZ16}} + \includegraphics[width=0.9\textwidth, keepaspectratio]{resources/memory_latency} + \caption{Memory hierarchy and energy cost of hierarchy levels \cite{DBLP:journals/corr/SzeCESZ16}} \end{figure} \end{frame} -\begin{frame} +\begin{frame}{Memory access} \begin{figure}[h] \centering - \includegraphics[width=0.65\textwidth, keepaspectratio]{resources/dnn_dataflows_access_png} - \caption{Common dataflow models in inference architectures (based on \cite{DBLP:journals/corr/SzeCESZ16})} + \includegraphics[width=0.6\textwidth, keepaspectratio]{resources/dnn_dataflows_png} + \caption{Common dataflow models in inference architectures \cite{DBLP:journals/corr/SzeCESZ16}} \end{figure} \end{frame} -\begin{frame} +\begin{frame}{Memory access} \begin{figure}[h] \centering - \includegraphics[width=0.9\textwidth, keepaspectratio]{resources/memory_latency} - \caption{Memory hierarchy and energy cost of hierarchy levels \cite{DBLP:journals/corr/SzeCESZ16}} + \includegraphics[width=0.6\textwidth, keepaspectratio]{resources/dnn_dataflows_access_png} + \caption{Common dataflow models in inference architectures (based on \cite{DBLP:journals/corr/SzeCESZ16})} \end{figure} \end{frame} -- cgit v1.2.1