From 927a6564ced09f1ed8355a0b77774e3757a9b77c Mon Sep 17 00:00:00 2001 From: Leonard Kugis Date: Wed, 5 Oct 2022 21:01:37 +0200 Subject: Fixed code, updated to 10 bit ADC usage --- templed.asm | 54 +++++++++++++++++++++++------------------------------- 1 file changed, 23 insertions(+), 31 deletions(-) (limited to 'templed.asm') diff --git a/templed.asm b/templed.asm index dfe4131..ffebb34 100644 --- a/templed.asm +++ b/templed.asm @@ -4,12 +4,12 @@ .def tmp2 = r18 .def tmp3 = r19 +.equ OFFSET_TEMP = 852 + ; Interrupt vectors .org 0x0000 interrupts: rjmp init - .org ADCCaddr - rjmp adc_isr .org INT_VECTORS_SIZE init: @@ -18,54 +18,46 @@ init: out SPH, tmp0 ldi tmp0, LOW(RAMEND) out SPL, tmp0 + ;ldi tmp0, 0b01000000 + ;out MCUCR, tmp0 ; Set pin directions ldi tmp0, 0b00010010 out DDRB, tmp0 ; Set default outputs ;ldi tmp0, 0b00000010 ;out PORTB, tmp0 - ; Initialize timer 0B - ldi tmp0, 0b00100011 - out TCCR0A, tmp0 - ldi tmp0, 0b00000001 - out TCCR0B, tmp0 - ; Initialize timer 1B - ldi tmp0, 0b00000001 + ; Initialize timers + ; Timer configuration: + ; Timer 0: Disabled + ; Timer 1: Fast PWM mode + ldi tmp0, 0b01100111 out TCCR1, tmp0 ldi tmp0, 0b01100000 out GTCCR, tmp0 ; Enable interrupts - ldi tmp0, 0b10000000 - out SREG, tmp0 + ;ldi tmp0, 0b10000000 + ;out SREG, tmp0 ; Initialize ADC ldi tmp0, 0b01000001 out ADMUX, tmp0 - ldi tmp0, 0b10101000 + ldi tmp0, 0b10000100 out ADCSRA, tmp0 - ; Start ADC conversion - sbi ADCSRA, ADSC + ldi tmp0, 255 - LOW(OFFSET_TEMP) + out OCR1C, tmp0 main: - rjmp main - -adc_isr: - push tmp0 - push tmp1 + ; Start ADC conversion + sbi ADCSRA, ADSC +capture: + sbic ADCSRA, ADSC + rjmp capture ; Read out ADC in tmp0, ADCL - in tmp1, ADCH ; Substract offset - subi tmp0, LOW(638) - sbci tmp1, HIGH(638) - ; Normalize to 8 bit for timer - lsr tmp1 - ror tmp0 - lsr tmp1 - ror tmp0 + subi tmp0, LOW(OFFSET_TEMP) ; Set as timer compare - out OCR0B, tmp0 + out OCR1A, tmp0 com tmp0 + subi tmp0, LOW(OFFSET_TEMP) out OCR1B, tmp0 - pop tmp1 - pop tmp0 - reti + rjmp main -- cgit v1.2.1